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TOP269 fails on EN-55014 certification tests

Posted by: ralph79 on

Hi all,
I have a power supply based on the TOP269EG with the an output of 24V @ 5A (max) and the input range from 190 ~ 260Vac.
This power supply was developed and designed according to the technical data (and datasheet) of the TOP269.. for now it works OK.. but it fails in the certification process, in this case in the norm: EN-55014
In attachments I send the scheme details and also the PCB drawing, and the result..any idea for this bad EMC performance? Is there anything that we have made incorrectly. In the results you can see the noise at at 150Khz and at 20Mhz... is there anything we can do to reduce it?
Thanks in advance.

Files

Attachment Size
scheme.jpg 162.62 KB
pcb.jpg 132.74 KB
results.jpg 249.54 KB

Comments

Submitted by PI-SevenOfNine on 07/19/2018

Hi Ralph79,

Thank you for using PI product on your design. You can try the following and check if it improves the conducted EMI:

1. Increase the total value of C91, C93, C94. Right now the total capacitance is 530nF. You may try to increase it to more than 750nF. But be careful with the safety certification for discharge. You may need to change also the R1 and R2 discharge resistors. You can also try to check our CapZero product for improve efficiency for this discharge resistors.
2. Can you try putting a shield in between the heatsink and T2. You may try to put a thin metal sheet in between to check if this is the cause of higher EMI.
3. You can try to add a differential choke in series to F line.
4. You can try to ground the core of the transformer. Put a tin wire on the core (i.e the conductive wire touches the core surface), then terminate it to either the GND or DC_Bus.
5. This can be difficult but looking into your layout, it seems there's a big loop going from DC_Bus to + of transformer then to the drain of the IC, then Source of the IC to C3 ground then to negative of the bridge. This loop area generates noise and it can creep going to the line which may result to higher EMI. If possible always make this loop as small as possible.

Thanks.

Best Regards,
PI-SevenofNine

Submitted by ralph79 on 07/20/2018

Hi SevenofNine,

I will do the changes you advice and I will test it under the lab. I have just a doubt, in the transformer (point 4 of your advices), has I have transformer already made (custom made) it will not be feasible to make your suggestion, is there any workaround to this?
Regards

Submitted by PI-SevenOfNine on 07/23/2018

Hi ralph79,

Please check first the other items. If already okay, no need to do item#4. Thank you.

Best Regards,
PI-SevenofNine

Submitted by ralph79 on 07/30/2018

Hi SevenofNine,
I have made all the suggestions you have said (not the item #4). The results are a little bit better but it continues to fail. In attachment I send the new documents.
Any feedback?

Attachment Size
with no load -> Stanby 238.13 KB
with normal load 247.29 KB
max load 263.4 KB
Submitted by ralph79 on 07/31/2018

Hi PI-SevenofNine
in attachment in the schematic of our system according to your suggestions, even tough, the results as I have said previously are not satisfied.. do you have more suggestions and/or ideas?
Thanks in advance.
Ralph

Attachment Size
top269-sch-2.png 111.48 KB
Submitted by PI-SevenOfNine on 07/31/2018

Hi ralph79,

After checking your circuit again, it seems that the snubbing circuit were not optimized. The diode (D1) used for the primary snubber circuit should be a slow diode. You can try to use FR107 for this. The snubbing circuit were also using very large values of capacitor (C64 & C63) as well as the discharge resistor of 47K in parallel. You may refer to the snubber circuit of similar design on below link.

https://ac-dc.power.com/design-support/reference-designs/design-examples/der-580-118-w-high-line-input-non-pfc-cv-cc/

Please also modify the snubber RC on the secondary circuit (R21 and C66). Please changed it to 220pF and 68ohms.

Please also change bias diode (D3) to US1D. You do not need a schottky diode here.

Hopefully it helps.

By the way, what location are you from? We can forward your concern to our FAE's near your region. Thanks.

Best Regards,
PI-SevenofNine

Submitted by ralph79 on 08/01/2018

Hi PI-SevenofNine,
I'm speaking from Portugal..
I try to do the suggestions you are asking for.. and I will test it..
Best Regards,
Ralph

Submitted by ralph79 on 08/02/2018

Is it possible to speak with your FAE engineer? Can you send me the contact?

Submitted by PI-SevenOfNine on 08/02/2018

Hi ralph79,

Kindly refer to the link below for our sales offices. I am not quite sure which of these is near your area. Thank you.

https://ac-dc.power.com/sales/

Best Regards,
PI-SevenofNine

Submitted by ralph79 on 08/03/2018

I have been trying to contact your local area sales network (for the FAE), but with no luck...

Submitted by PI-SevenOfNine on 08/10/2018

Hi ralph79,

What local sales area you are contacting. I will try to email them, but I need to know which sales area you are near. Thank you.

Best Regards,
PI-SevenofNine

Submitted by ralph79 on 08/13/2018

I have tried to contact to the following emails:
eurosales@power.com;
eurosales@power.com;

I have received the contact from the FAE of the Future Electronics, which after a very friendly conversation and with all the good intention said do me the following:

"I asked to PI for more support, and at this moment as we are in August the best they can do is to propose you to use attached application notes regarding EMC.

They are based on a previous generation of TopSwitch but they are very actual."

Submitted by PI-SevenOfNine on 08/16/2018

Hi ralph79,

That's good to hear. Maybe the application notes provided to you by Future Electronics can be of great help. By the way, did you try to redesign your snubber circuit? Thanks.

Best Regards,
PI-SevenofNine

Submitted by ralph79 on 08/20/2018

Hi SevenofNine,
I have already seen all the application notes provided by Future but I continue to have doubts in how to calculate the values of the capacitors, inductors and resistors to reduce the EMI interference and radiation... At this moment we are making a new pcb.. But I would like to have further information.. Also, in my last meeting with the FAE from Future..he said we will try to discuss this matter with PowerIntegration to have better support for this problem.. Also, I would like to know more "best practices" in the Pcb design with your Top269...
Thanks in advance
Best regards

Submitted by ralph79 on 08/21/2018

Hi SevenofNine,
I have already seen all the application notes provided by Future but I continue to have doubts in how to calculate the values of the capacitors, inductors and resistors to reduce the EMI interference and radiation... At this moment we are making a new pcb.. But I would like to have further information.. Also, in my last meeting with the FAE from Future..he said we will try to discuss this matter with PowerIntegration to have better support for this problem.. Also, I would like to know more "best practices" in the Pcb design with your Top269...
Thanks in advance
Best regards

Submitted by ralph79 on 09/04/2018

Hi SevenOfNine,

The document you are referring to explains the layout consideration for the PCB, but still I don't have a spreadsheet or a calculating basis for the calculation of the filter values (resistors and capacitors).. can you give me that?