Solution Finder Get Tech Support

Three Phase SMPS using PI expert.

Posted by: Paul_Adebo on

Hello,

I completed our SMPS design using the PI expert Tool for a single phase applicaiton, which is presently working fine with out end product (energy meters), and tested to be okay. See schematic attached (MMXPLC-PSU-1203-1203)

However, I tried to implement same for the our three phase applicaiton, by altering only the rectifyfing diodes up towards the mains supply, to accomodate the three phase input (see attached - MMXPLC006_PSU_SCH_v01), but the 2 caps C4 and C5, got exploded.

Designed input range: 100 - 240VAC.

I previously, tested the three phase SMPS by paralleling all three phases and connecting to a single input source, and its okay...I got my outputs with the end device powered and working. I then thought all was okay.

But when I connected to an ideal three phase....there was a BANG! I had to replace the caps, and D18 at the second output for me to get it back working.

I tested, and observed, that at 180VAC to applied to each of the phases, there was about 430VDC rectified DC, which justified the burst-up at 220VAC.

I just read about the StackFET design, which was not implemented in my design. Could this be the problelm? 

If it is, can I be guided on the steps to take to implement the StackFET into this design.

if it was not the cause, then how can I figure out the problem?

Thanks.

Paul A.

Files

Attachment Size
Three Phase Diagram 37.52 KB
Single Phase Diagram 2.26 MB
Parallel Connection. 1.82 MB

Comments

Hello PI-ODO,

Thanks for the attached Documents. I have read the documents it, and I will go through again.

However, it does not specific how the values for the StackFET components are calculated or are the selected value in the example circuit diagram uniform for all applications?

My applicaiton uses a 230VAC idealy, with a frequency of 50Hz, could I adopt the components values as used in the example.

Nevertheless, I need to know how this values can be derived.

Thanks.

Paul. A 

Hello Paul,

 

While I confirm and check for more information, please consider the example as an illustration of the concept and a potential starting point to meet your requirements.  Adoption of the component values is best based on actual testing of your application.

 

-PI-ODO

Submitted by Paul_Adebo on 03/20/2017

In reply to by PI-ODO

Hello PI-ODO,

Thanks for your response, as I so await more informations.

However, inother to avoid the blast of the caps, I added two extra caps, in series with the previous two, so the voltage can be shared across each one.

This is working though for now, so at least, I can go on testing other aspect of our product design; but reading the documents you sent to me...

"However,by adding an external MOSFET in a cascode or StackFET configuration, it is possible to distribute the voltage stress across two devices, resulting in an over-all voltage rating equal to the sum of the individual MOSFET voltages."

Obviously, I need the StackFET configuration in the three phase implementation, for the mass production of our product.

Thanks,

Paul A.

Submitted by PI-ODO on 03/22/2017

In reply to by Paul_Adebo

Hi Paul,

 

For the three-phase implementation (440V/480V), here are the design rules for using the StackFET (referring to the article for component designators):

 

1. The switching elements (external MOSFET and the integrated power supply controller) share the voltage stress.

 

2. The voltage across the integrated power supply controller is set by the combination on VR1, VR2 and VR3. In the example shown in the article, it is (150 *3 = 450V).

 

3. The remaining voltage, which is (VDCmax + VOR[set by turns ratio]+ Spike voltage[set by VR5]) – (VR1+VR2+VR3), is the voltage that appears across the external MOSFET. The selected external MOSFET needs to have at least 120% higher voltage rating over this calculated voltage.

 

4.  VR4 ensures that the gate-source voltage of external MOSFET never exceeds 15V and is not required to be changed if the external selected MOSFET has a rated gate voltage in excess of 15/18V.

 

Other than that, the selection of the components in the flyback circuit follows the standard rules for a flyback design.

 

-PI-ODO

Submitted by Paul_Adebo on 03/23/2017

In reply to by PI-ODO

Hi PI-ODO,

Thanks for the explanation provided.

We will work on the information supplied, and will let you know if there are any more clarifications needed.

Regards

Paul A.

Submitted by asifks on 10/02/2018

Hi ,

Currently I am on 3 phase SMPS design with dual output (12 V and 5 V).
kindly help me to find a solution,
which topology should i use
how much voltage will be there when a 3 phase input has given to a full wave rectifier

thank You !

Submitted by PI-ODO on 10/17/2018

Hi asifks,

A flyback topology should be suitable. For a full-wave 3-phase rectifier, the DC voltage value is equal to 3*(Vline_pk)/pi, where Vline-pk is the maximum line-to-line voltage (i.e. Vline * 1.414).

-PI-ODO