Solution Finder Get Tech Support

About TOP switch based SMPS Ripple problem

Posted by: RUTUJA SANJAY … on

Hii....
I have designed SMPS with universal input (85-265V) and Fixed output 24V/3Amp using TOP258YN in PI Expert.By testing the SMPS work correctly but there is high ripple during switching.
when we test SMPS without load then 2V (P-P) ripple generated at output. and when we add load then heavy ripple generated.
Please help us to reduce the ripple in SMPS. For that i attached complete circuit diagram please check the attachment.

Files

Attachment Size
smps circuit diagram 6.52 KB

Comments

Submitted by PI-Wrench on 01/22/2021

It sounds like you might have a loop stability issue. Also, the schematic file you have posted is too large to open. Please re-post as a *.gif or *.png file, which should be more compact.

Submitted by RUTUJA SANJAY … on 01/24/2021

Hii..
Please find the attached circuit diagram of SMPS and ripple generated at output without load.

Attachment Size
Circuit diagram 119.48 KB
Ripple in SMPS 31.95 KB
Submitted by RUTUJA SANJAY … on 01/25/2021

please anyone else can help me for solving SMPS ripple.

Submitted by PI-Wrench on 01/25/2021

Thanks for the picture. what you are seeing is high frequency ripple. If you are using a standard oscilloscope with ground lead, the high frequency ripple you are seeing may be greatly amplified by pickup due to the loop area of the ground lead. Attached is a setup for measuring ripple that reduces the effects of probe pickup.

Submitted by RUTUJA SANJAY … on 03/01/2021

Thank you sir for reply.
as per our conversation we used ripple measurement setup in photo that you send us. we observe there is no ripple present at the output.so we confused, so please tell us is it problem in our circuit or in our oscilloscope.
please clarify our confusion
thank you

Submitted by NISARG PATEL on 01/29/2021

you can also try analog scope for more sudden results

Submitted by PI-Wrench on 01/29/2021

To understand the problem, you need to consider your oscilloscope as a sensitive high-impedance receiver. When you use the standard scope probe and ground lead, the extended ground lead acts as a loop antenna and preferentially picks up high frequency noise from the rest of the supply due to fast switching transitions. That gives rise to the high frequency "grass" shown in the picture supplied. The "noise probe" drastically reduces the loop area of the oscilloscope probe connection and allows you to get a more realistic picture of the output ripple. The noise probe without capacitors is also very useful for viewing low level signals in the noisy environment of the typical SMPS. The noise probe setup with capacitors is a typical one used by SMPS manufacturers to measure output ripple.
When using the noise probe setup, make sure that the scope probe is properly seated in the adapter, otherwise you get no signal and a falsely optimistic picture of output ripple. You can test the setup by touching the center conductor (the "hot" side") with your finger. If the scope probe is properly seated, you should see an indication on the scope due to noise pickup.

Submitted by RUTUJA SANJAY … on 02/01/2021

Thank you sir for reply.
For our application, we required ripple free SMPS or minimum ripple in SMPS. as per TOP258YN datasheet PCB layout consideration is very important.
Is it problem of ripple due to PCB layout? please check our SMPS PCB layout.
Find the attached of PCB layout.
Thank you.

Attachment Size
PCB layout 425.44 KB
Submitted by PI-Wrench on 02/01/2021

First things first - what is your ripple requirement, and how much ripple are you actually seeing? How much of it is at the fundamental switching frequency, and how much is high frequency "grass"?

More thoughts - The secondary loop area of D1 and C2 is excessive, and could be tightened up considerably. The loop area of R1 and C1 with D1 is also rather large. Also, the values in the R1/C1 secondary snubber are rahter small and won't do much good for damping the ringing when D1 turns off this will contribute to secondary HF noise, as well as EMI. More appropriate values for R1 and C1 are ~15 ohms and 1nF, respectively. These values should be tuned to minimize the leakage and voltage spike when D1 turns off. In you would balance noise with power dissipation in R1.

Submitted by RUTUJA SANJAY … on 02/02/2021

1) what is your ripple requirement?
- 100mV peak for 2A load.
2) how much ripple are you actually seeing?
- 1V peak without load.
3) How much of it is at the fundamental switching frequency?
- 132KHz

and sir you suggest for RC snubber values of R1 and C1 are ~15 ohms and 1nF respectively.we put this values in our SMPS circuit but we observe no any improvement in our smps circuit ripple.

Submitted by PI-Wrench on 02/02/2021

It would be useful to see a picture of the actual ripple taken at the output connector using the modified scope probe with capacitors.
I have had a closer look at the layout, and have also compared it to the circuit diagram - I have some questions.
1) What sort of capacitor are you using at the 24V main output right after D1 (C2)? This should be a low ESR cap with adequate ripple current rating. If not, there will be excessive output ripple and short capacitor life. The schematic shown calls out 2 X 560uF, 35V caps in parallel - I see only one capacitor (C2) on the layout provided. One capacitor might work if it is 1000uF, 35V, and the best quality available. UCC KZE series or similar would be preferred for low ESR, adequate ripple current rating, and long life.
2) On the layout I see thin secondary traces on the top side surrounded by large copper areas that appear intended to thicken the traces, but are not properly attached to the appropriate circuit nets. If the same is true on the bottom side of the board, then the secondary traces are actually very thin, and will be dropping sufficient voltage to increase the output ripple. If this is actually true, you can experimentally augment the secondary traces with bare copper wire to see the effect on the output ripple before making a 2nd layout pass.
3) The schematic shows a Y capacitor (C6) connected between secondary return and primary B+. This capacitor provides a return path for common mode noise coupled through the transformer interwinding capacitance. This capacitor is not present on the layout. Without this capacitor, there will be a lot of common mode noise at the supply output that can easily be picked up by a scope probe such that it looks like ripple. Without this capacitor, it will also be difficult to meet EMI standards. The capacitor should be ~ 1nF, and be a Y1 rating.
4) Capacitor C3 should be moved right next to the output connector to prevent the output traces from picking up noise. You can experiment with the effect of moving C3 by unsoldering it and re-soldering it right across the output connector pins.
5) The bias winding connections on the transformer should be moved to the same side of the transformer as the main primary winding. Since the board is double sided, there should be no problems with connecting the pins up properly. It will also eliminate the need for so many board slots for safety, and will give you more freedom for optimizing the secondary layout.
I am attaching a crude picture showing some suggestions for layout changes. If it is not sufficiently clear, please ask...

Attachment Size
PI-1600x1200@2x_DPA-Switch-SMD-8.png 274.46 KB
Submitted by RUTUJA SANJAY … on 02/02/2021

Thank you for reply.
1) What sort of capacitor are you using at the 24V main output right after D1 (C2)?
- 560uF/35V (wourth Elektronik)

Submitted by PI-Wrench on 02/03/2021

As a rule of thumb, the maximum ripple current in the output filter capacitor of a flyback supply is approximately equal to the maximum DC output current. In many situations, the actual ripple current is more. The required ripple current rating for the output filter capacitors should be listed in the design files for your power supply. The Wurth capacitor you are using has a ripple current rating of only 1.5 A, so it will have higher ripple and shorter life at the maximum output current for your supply. This is why the schematic specifies (2) 560u/35 capacitors rather than just one.

This factor and the others factors I mentioned in the previous post are all reasons why your supply has higher output ripple.

Submitted by RUTUJA SANJAY … on 02/07/2021

thanks.
according to our discussion,we add Y capacitor (C6-22pF/1KV) between secondary return and primary B+,then ripple get reduce by 20mV only.
also we did try other experiment like 1)two 560uF/35V capacitor parallel at output filter.
2) Capacitor C11 (100uF/35V) moved right next to the output connector.
3) used single 1000uF/35V capacitor at output filter.
But ripple doesn't reduce.
Find the attached photo of reduce Ripple and waveform at drain pin of the switch.

Submitted by PI-Wrench on 02/08/2021

I am not surprised that the Y capacitor did not do much good, as the value used (22pF) was ~50 times less than the value recommended (1000pF/1nF). The Y capacitor needs to be large compared to the value of transformer interwinding capacitance to provide an adequate return path for common mode noise.
From the picture of the output ripple, common mode noise is likely your main problem, and anything you can do to reduce it will help your ripple. If all else fails, you can add a small common mode inductor in place of the 3.3uH differential choke currently used. This will also help with EMI. I have included a picture of a couple of hand-wound toroidal common mode filter chokes. You might also try a choke similar to this one distributed by Digi-key::
https://www.digikey.com/en/products/detail/kemet/SC-06-01G/10441807
The Digi-Key choke has separated windings, which will result in higher leakage indictance and more differential mode filtering than the hand-wound chokes, which have both windings applied simultaneously, resulting in low leakage, and thus a relatively modest amount of differential mode filtering.

Submitted by RUTUJA SANJAY … on 02/24/2021

Thank you sir for Reply....
As per our discussion and your suggesions we working on layout of SMPS Design.
Before that we have another one question..
we have also design Dc to Dc Converter using DPA424PN.Design Specification are given below..
1) power :- 11.5W
2) Input Voltage:-24-25 VDC
3) output 1:- +15V @ 0.5 Amp
4) output 2:- -8V @ 0.5 Amp
when we check SMPS without load then output is OK. but when we add 0.1Amp load at +15V then after 2 Sec output diode (MUR110E) get heated and output goes to 0V.
after that we replace this diode with 1N5822 and check output. then our output is correct and diode not heated.
please tell us why MUR110E get heated?

Submitted by PI-Wrench on 02/26/2021

I'm not quite sure what is going on with your DPA-Switch design, especially as the MUR110E is overheating at only 0.1A load. I would expect this sort of thing to happen at closer to full load, due to the high operating frequency (300/400 kHz), plus the high forward voltage drop and high turn-off loss of the MUR110E. Please check and make sure the transformer polarity is correct. A mis-phased transformer will result in high peak currents in the output rectifiers, and perhaps high turn-off losses as well.
Having said that, Schottky diodes are a better choice for output rectifier/s in this design due to the low forward drop and low turn-off losses.

Submitted by RUTUJA SANJAY … on 02/28/2021

Thanks for reply.
At without load,output voltage is steady(about 15V) and diode does not heat .diode get heated only when we apply load at output.
As you said,we checked Transformer polarity.it is correct.
suppose our transformer polarity are wrong in this case can SMPS give output voltage right?

Submitted by PI-Wrench on 03/01/2021

If the transformer polarity were wrong the supply would be trying to peak charge the output capacitors during the on-time of the primary switch, resulting in high peak current in the output rectifiers. . The supply output would also tend to collapse when a light load is applied, due to the high peak primary current. The supply might try to regulate by programming a very slow duty cycle.